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0x83 ( 133 ) Internal Port Decoding Enables (0x85 is MSB) (soft reset if bit 31 = 1, hard reset if bit 31 = 0 : all 1) (0x83)

Bits	Description
0	port ff
1	port 7ffd
2	port dffd
3	port 1ffd
4	+3 floating bus
5	port 6b zxn dma
6	port 1f kempston / md1
7	port 37 kempston 2 / md2
8	port e3 divmmc control
9	multiface (two variable ports)
10	port 103b,113b i2c
11	port e7,eb spi
12	port 133b,143b,153b,163b uart
13	port fadf,fbdf,ffdf mouse (also disables kempston alias on port df)
14	port 57,5b,303b sprites
15	port 123b layer2
16	port fffd,bffd ay
17	port 0f,1f,4f,5f dac soundrive mode 1
18	port f1,f3,f9,fb dac soundrive mode 2
19	port 3f,5f dac stereo profi covox
20	port 0f,4f dac stereo covox
21	port fb dac mono pentagon/atm (sd mode 2 off)
22	port b3 dac mono gs covox
23	port df dac mono specdrum, port 1f kempston alias
24	port bf3b,ff3b ula+
25	port 0b z80 dma
26	port eff7 pentagon 1024 memory
27	port 183b,193b,1a3b,1b3b,1c3b,1d3b,1e3b,1f3b z80 ctc
31	register reset mode (soft or hard reset selection)

Mode Notes:

0x89,0x88,0x87,0x86 (137-134) => Expansion Bus Decoding Enables (0x89 is MSB) (soft reset if bit 31 = 0, hard reset if bit 31 = 1 : all 1)

Notes:

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  ...
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  The internal port decoding enables always apply.
  When the expansion bus is on, the expansion port decoding enables are logically ANDed with the internal enables.
  A zero bit indicates the internal device is disabled.  If the expansion bus is on, this allows io cycles for
  disabled ports to propagate to the expansion bus, otherwise corresponding io cycles to the expansion bus are filtered.