| Bits | Description |
|---|
| 7 | port 0xdffd bit 0 \ RAM |
| 6:4 | port 0x7ffd bits 2:0 / bank 0-15 |
| 2 | port 0x1ffd bit 0 paging mode |
| 1 | port 0x1ffd bit 2 \ ROM |
| 0 | port 0x7ffd bit 4 / select |
| 1 | port 0x1ffd bit 2 \ all |
| 0 | port 0x1ffd bit 1 / RAM |
Notes:
R bit 3 = 1
W bit 3 = 1 to change RAM bank, 0 = no change to mmu6 / mmu7 / RAM bank in ports 0x7ffd, 0xdffd
If bit 2 = paging mode = 0 (normal)
If bit 2 = paging mode = 1 (special allRAM)
Writes can affect all ports 0x7ffd, 0xdffd, 0x1ffd
Writes always change the ROM / allRAM mapping
Writes immediately change the current mmu mapping as if by port write